Tutorial on Hardware Board Design | FPGA

Sunday 21 February 2016

Allegro Viewer- Layout Review Settings

Layer visibility Settings

Mask Enable

Mask TOP: The mask will not present on the visible area.

Paste TOP: Solder paste will be present on the paste top.

Silkscreen TOP: Ref des, connector details will be visible on the layer.

Check out this blog for Hardware Board Design Tutorial.

Allegro Viewer - Layout Review Settings

This section explain how to set up a board file prior to layout review:

Allegro Viewer - Layout Review Method

This section explain how to set up a board file prior to review:

DFM - PCB Gerber Checklist

**Click on the image for readability**

Next Class - PCB Layout Checklist