Class 09 : VHDL Programming

VHDL Programming - Basics

• Above list is keywords in VHDL programming. It will be blue color in the program edition.It is not allowed to use the keyword as variable name.

• Example program. Entity part. x,y are single bit input variable.
• Sum, carry is single bit output variable.

• Architecture Body. Half added logic written.

• VHDL program to deine single bit buffer with enable.
• The variable inside process statement is called sensitive variable.
• Any change happening in the sensitive variable will execute the logic. 

If you have any questions please email us : miycircuits@gmail.com

Class 08 - VHDL PROGRAMMING - Basic Only

VHDL Programming: 

• VHDL Program having two blocks. Entity and architecture body.
• Entity block includes the input and output ports used in the program.
• Architecture Body includes the logic.

• Entity is keyword. even_detector is program name. 
• The input and output ports is defined under the port function.
• Input/output can be single or multi bit variable.
• Single bit variable defined as std_logic
• Multi bit variable defined as std_logic_vector(X downto 0)
• Input variable defined as keyword in
• Output variable defined as keyword out

• In the port definition,make sure the output variable is not used for input for the logic.
• In such case, the variable should be defined as signal.

• Architecture body having a program (logic). 
• Local signal declarations can be added.
• Program will be written in between begin and end statement.

Class 07 : Logic Design Process

Logic Design Process:

Synthesis:

Netlist:

Mapping:

Routing:

Programming file:

Logic Design Process by the tool:

• Write the logic in VHDL/Verilog

• Check the syntax.

• Synthesis,placement,routing and generating programming files will be taken care by the software tool provided by Xilinx/Altera.

•  Tool generate the netlist then netlist will be converted in to basic digital elements.

•  Logic elements will be grouped to fit in to the CLB in the placement process.

•  Once placement is done, routing process will make the interconnection between the CLBs.

•  Once routing is complete, the programming file (.bit)will be generated and it will be saved in the  project folder.

Class 06 : FPGA I/O

FPGA I/O 

• Based on the FPGA family the number of banks will vary.
• Each bank having dedicated power and GND pins.
• All the I/O pins will be powered based on the voltage connected to the particular bank
• Based on the device/peripheral logic connected to the bank . bank voltage will be powered. 
• Ex. DDR2 - 2,5V. DDR3 - 1.5V and device with 1.8V and 3.3V should be connected to the bank powered with those voltage respectively. 
• It is not allowed to connect the device with different voltage level logic with FPGA I/O with different voltage logic.

Single Ended and Differential Signalling: 

• FPGA I/O pins can be configured with single ended and differential signals.
• Signals are named with _P/N can be used as differential signals.
• Fews signals will be IP (input only). It is not allowed to assign a output logic with this pin.

I/O Pins

• I/O pins can be configured as Input or output or tristate. 
• If pin is configured as input, the output logic shouldn't be assigned and vice versa.
• If pin is configured as tri-state means it neither draw a current nor sink it.

Class 05- FPGA Architecture

FPGA Architecture:

General Structure of FPGA:

1. CLB includes Programmable logic Blocks and Programmable interconnect

2. Programmable logic block includes logic elements. 

Configurable Logic Blocks:

1. CLB includes Slice.

2. Each slice includes the logic cell. 

3. Logic cell includes basic logic elements like Gates, multiplexer and registers. 

Connection block:

1. Connection block includes switch block(SB) and connection blocks  (CB) and wires.

2. Connection block is used to connect the CLB to a switch box.

3. Switch blocks is used to make a connection between a switch blocks.

If you have any questions please email to miycircuits@gmail.com

Class 04 : FPGA Architecture

Internal Blocks of the FPGA:

Blocks inside the FPGA:

1. Configurable Logic Blocks (CLB) - that holds the basic elements to implement the logics

2. Block RAMs - used as temporary memory to hold and process the data.

3. I/O Blocks - Used to interface with external world.

FPGA in the Market:

1. Two major vendors designing FPGAs are Xilinx and Altera

2. Both companies having their own software tools to design and configure the FPGA.

Xilinx FPGA:

Xilinx Family FPGA:

1. In this course, we will be using the xilinx FPGA. 

2. Spartan family FPGAs are optimized for logic, I/O and cost is affordable for students and engineers.

3. Virtex FPGAs are high end to implement complex IP and high speed interfaces. Mostly it will be used in the industry.

If you have any questions please email to miycircuits@gmail.com

Class 03 : FPGA in electrical Engineering

FPGA in Electrical Engineering:

Few applicable usage of FPGA in Electrical engineering:

1. PWM controller for DC-DC converter

2. Closed loop design for the DC-DC converter

3. Design of AC-DC / DC - AC converter.

4. SPWM controller for inverters

5. System control and monitoring

6. MPPT controller design for the non-conventional energy sources

7. AI controller implementation (Genetic,Fuzzy, neural networks)

Class 02 : FPGA Vs ASIC

Class 02 : FPGA Vs ASIC

FPGA Vs ASIC

FPGA Vs MICRO-CONTROLLER

Points:

FPGA Vs ASIC

• FPGA logic are re-configurable.
• Fabrication cycle is not there for each and every design. It can be bought off the shelf.
• Expensive and power consumption is more.

MICROCONTROLLER Vs FPGA

• Microcontroller is control over the software.
• FPGA is control over the hardware.

Class01: Application of FPGA in Electrical Engineering

 Class 01 : Introduction

In this Course we will be learning following topics 

•   Fundamentals of FPGA Architecture
•   Fundamentals of VHDL Programming
•   Implementation of projects using Xilinx ISE tool
•   Fundamentals on FPGA development platform
•   PWM techniques for DC converters
•   SPWM techniques for Inverters
•   Interfacing ADC/DAC devices
•   Interfacing UART controllable PWM 
•   PID controller design
•   Implementation of Closed Loop Operation of converters

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Application of FPGA in Electrical Engineering

Course on Application of FPGA in Electrical Engineering

• Course content will be updated in this Blog. If you like to attend the course just follow this blog and add us in to your Google+ 
• The course will be starting from the basics of FPGA Architecture, Xilinx Tool, VHDL and PWM techniques.
• There is no course fee involved.