FPGA Design Interview Questions: - Part 7

FPGA Design Interview Questions: - Part 7

**Entry level FPGA interview questions for 0-3 Exp FPGA Designers**


Program1:     Write a VHDL code for frequency divider by 2 

Program2:     Write a VHDL code for frequency divider by 16 

Program3:     Write a VHDL code for frequency divider by 10 

Program4:     Write a VHDL code for frequency divider by 10 using integer counter.

Program5:     Write a VHDL code to  generate 00 to 99 counter with asynchronous reset. 

Program6:     Write a VHDL code for LED chaser for 8 LED's. 

Program7:     Write a VHDL code for BCD to 7 segment Driver.

Program8:     Write a VHDL code for Stepper motor driver- Half step

Program9:     Write a VHDL code for Stepper motor driver - full step

Program10:    Write a VHDL code for timer based traffic light controller

Program11:    Write a VHDL code for sensor based traffic light controller

Program12:    Write a VHDL code for 2:1 mux using stuctural model

Program13:    Write a VHDL code for 4 bit adder using stuctural model

Program14:    Write a VHDL code for 4 bit adder using xor gate

Program15:    Write a VHDL code for 4 bit 2:1 mux using structural model

Program16:    Write a VHDL code for ALU using structural model

Program17:    Write a VHDL code for 4 bit serial In - Parallel out shift register

Program18:    Write a VHDL code for 4 bit parallel in - Parallel out shift register

Program19:    Write a VHDL code for 4 bit serial In - serial out shift register

Program20:    Write a VHDL code for 4 bit stack design using structural modelling

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